SystemVerilog Data Types

Table of Contents

SystemVerilog - This article is part of a series.

Part 1: SystemVerilog Intoduction

Part 2: This Article

Part 3: SystemVerilog Arrays

Part 4: SystemVerilog Typedef & Alias

Part 5: SystemVerilog Loops & Control Flow Statements

Part 6: Blocking vs Non-Blocking Assignments

Part 7: SystemVerilog Tasks and Functions

Part 8: SystemVerilog `fork...join`

Part 9: SystemVerilog `interface`

📘 SystemVerilog Data Types – A Complete Overview (with Default Properties)
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SystemVerilog improves Verilog by introducing a richer, more precise type system. Below is a full breakdown of key SystemVerilog data types — including their default bit widths, signedness, and default values.

🔁 1. 4-State vs 2-State Types
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Type	States	Default Size	Default Signedness	Default Value	Notes
`logic`	0, 1, X, Z	Scalar (1-bit) or user-defined	Unsigned	`X` (unknown)	Use instead of `reg` and `wire`
`reg`	0, 1, X, Z	Scalar (1-bit) or user-defined	Unsigned	`X`	Legacy, replaced by `logic`
`bit`	0, 1	Scalar (1-bit) or user-defined	Unsigned	`0`	2-state only, useful in simulations

✅ Use logic for RTL and bit when X/Z modeling is unnecessary.

🧮 2. Integer Types
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Type	Size	Signed	Default Value	Notes
`byte`	8-bit	Yes	`0`	Signed by default
`shortint`	16-bit	Yes	`0`
`int`	32-bit	Yes	`0`	Most commonly used
`longint`	64-bit	Yes	`0`
`integer`	≥32-bit (impl. defined)	Yes	`0`	Legacy type from Verilog
`time`	64-bit	No	`0`	Used for simulation timing

🧠 Tip: Prefer int, longint, bit over legacy integer.

🔤 3. String Type
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Type	Description	Default Value	Notes
`string`	Dynamically sized text	Empty string `""`	Supports methods like `.len()`, `.putc()`

string msg = "Hello!";
$display("Length = %0d", msg.len());

🔘 4. Enumerations (`enum`)
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Feature	Description
Syntax	`typedef enum {A, B, C} name_t;`
Underlying type	Can be defined (e.g., `enum logic [1:0]`)
Default value	First listed value (unless specified)
Signed?	Follows underlying base type

📦 5. Structures (`struct`)
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Feature	Description
Syntax	`typedef struct { ... } name_t;`
Packed?	Use `packed` keyword for bit-accurate layout
Default values	Each field initialized to its type’s default
Nesting	Structs can include other structs

typedef struct packed {
  bit [7:0] id;
  logic     valid;
} header_t;

🔄 6. Unions (`union`)
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Feature	Description
Shared Memory	All fields use same memory space
Packed Union	Use `packed` for precise layout
Tagged Union	Use `union tagged` to ensure safe access

📚 7. Arrays
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Array Type	Description
Packed Array	Bit vectors (e.g., `logic [7:0]`)
Unpacked Array	Collection of objects or elements
Dynamic Array	Resizable during runtime
Associative Array	Indexed by any scalar (e.g., `string`)
Queue	FIFO-like data structure (e.g., `int queue[$]`)

📗 8. Other Special Types
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Type	Description
`void`	No return value
`event`	Simulation synchronization primitive
`chandle`	C-language pointer
`mailbox`	Communication between processes
`semaphore`	Resource control between processes

✅ Summary Table (Compact Reference)
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Type Group	Examples	Default Size	Default Signedness	Notes
2-state	`bit`, `int`, `byte`, `longint`	Fixed-width	Signed (mostly)	No X/Z states
4-state	`logic`, `reg`, `integer`	Variable	Unsigned (logic), Signed (integer)	Supports X and Z
Textual	`string`	Dynamic	—	Supports common string methods
Composite	`struct`, `union`, `array`	Custom	Follows fields	Grouped or indexed values
Enumeration	`enum`	Customizable	Base type’s signed	Symbolic values with readability
Special	`time`, `event`, `chandle`, `mailbox`	Varies	Varies	Simulation or interprocess use