🚀 What is Transaction-Level Modeling (TLM)?#
Transaction-Level Modeling (TLM) is an approach used to model high-level data communication in a verification environment. Instead of relying on traditional signal-based connections, TLM represents data as transactions (class-based objects), making the verification environment simpler, more readable, and more scalable.
In UVM (Universal Verification Methodology) testbenches, TLM enables communication between components using port-export-imp structures. This helps build a more flexible and reusable architecture between testbench modules.
🔎 Advantages of Using TLM#
✅ Provides Abstraction Reduces signal-level complexity and allows transactions to be managed more easily.
✅ Easy Integration Enables independently developed modules to be easily integrated into the testbench environment.
✅ Improved Readability and Faster Development Centralized management of data transfers using ports and exports accelerates test environment development.
🛠️ Fundamental TLM Structures#
🔹 Port Used by components that want to send data. The port is connected to an export or an imp at the next level to initiate data flow.
🔹 Export Receives data from a port and forwards it to the appropriate imp or another export. Typically used for hierarchical transitions.
🔹 Imp Implemented by the component that finally processes the data. It directs incoming port calls to its own method.
🔗 Blocking vs. Non-blocking Concepts#
🔸 Blocking:
During data transfer, the sender or receiver waits until the operation is completed (e.g., put(), get()).
🔸 Non-blocking:
The sender or receiver immediately reports whether the operation was successful or not and can proceed with other tasks (e.g., try_put(), can_put()).