UVM Test Usage and base_test Example

🧪 UVM Test: base_test Example

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🚀 Introduction

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In UVM, a test class (such as base_test) is the top-level component that manages and coordinates the testbench scenario. It is responsible for creating the environment, setting default sequences on the sequencer, and initiating the simulation.

📝 base_test Example

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Below is an example of a base_test class. This class creates the environment, configures waveform recording parameters, and orchestrates the overall test structure.

class adder_test extends uvm_test;
    adder_env env;
    adder_config cfg;

    `uvm_component_utils(adder_test)

    function new(string name = "adder_test", uvm_component parent);
      super.new(name, parent);
    endfunction

    virtual function void build_phase(uvm_phase phase);
      super.build_phase(phase);
      env = adder_env::type_id::create("env", this);
      cfg = adder_config::type_id::create("cfg");
      uvm_config_db #(adder_config)::set(this, "env.agent*", "cfg", cfg);
    endfunction

    virtual task run_phase(uvm_phase phase);
      adder_sequence seq;
      seq = adder_sequence::type_id::create("seq");
      phase.raise_objection(this);
      seq.start(env.agent.sequencer);
      #100;
      phase.drop_objection(this);
    endtask
  endclass

🔍 Explanations

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• env: The environment component that contains the agent and scoreboard.

• build_phase():

  • uvm_config_int::set can be used to configure waveform recording detail.
  • The environment is created using the factory.
  • A default sequence is assigned to the sequencer using uvm_config_wrapper::set.

• end_of_elaboration_phase(): Prints the testbench topology for debugging.

• start_of_simulation_phase(): Prints an informational message at the start of the simulation.

• check_phase(): Checks configuration usage.

💡 Summary

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🔹 The test class sits at the top of the UVM testbench and orchestrates the entire scenario. 🔹 In build_phase(), it creates the environment and assigns the default sequence. 🔹 The testbench topology is printed, and users are informed at the simulation start.