↓
Skip to main content
Axolotl
Axolotl
Posts
Tutorials
Verilog
SystemVerilog
UVM
RISC-V
Quick Guides
About
➡️
Posts
Tutorials
Verilog
SystemVerilog
UVM
RISC-V
Quick Guides
About
➡️
Verilog Namespace
Verilog Namespaces: Understanding Scope and Modularity
26 May 2025
·
loading
·
loading
Kerim Turak
Hardware Design
Verilog Namespace
Verilog Scope
Modularity
RTL Design
Hardware Description Language
Hardware Design